Having had a similar board and memory part under logic analyzer, a
tINIT3 violation was measured. The fix was involved keeping tXPR and
SDE_to_RST at the power-on defaults and setting RST_to_CKE the JEDEC
value for LPDDR2.
Cc: Jason Liu <[email protected]>
Cc: Ye Li <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
/* MMDC0_MDRWD;*/
DATA 4 0x021b002c 0x0f9f26d2
/* MMDC0_MDOR */
-DATA 4 0x021b0030 0x0000020e
+DATA 4 0x021b0030 0x009f0e10
/* MMDC0_MDCFG3LP */
DATA 4 0x021b0038 0x00190778
/* MMDC0_MDOTC */
/* MMDC1_MDRWD;*/
DATA 4 0x021b402c 0x0f9f26d2
/* MMDC1_MDOR */
-DATA 4 0x021b4030 0x0000020e
+DATA 4 0x021b4030 0x009f0e10
/* MMDC1_MDCFG3LP */
DATA 4 0x021b4038 0x00190778
/* MMDC1_MDOTC */